产品概述
- 72Mbit (2M × 36/4M × 18/1M × 72) pipelined SRAM with NoBL™ architecture
- Pin compatible and functionally equivalent to ZBT
- Supports 167MHz bus operations with zero wait states
- Byte write capability
- Single 3.3 V power supply
- 3.3V/2.5V I/O power supply
- Fast clock-to-output time
- Clock enable pin to suspend operation
- Synchronous self timed writes
- IEEE 1149.1 JTAG boundary scan compatible
产品信息
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- 72Mbit
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- 2M x 36位
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- 3.135V 至 3.63V
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- TQFP
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- 100引脚
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- 3.4ns
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- -40°C
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- 85°C
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- -
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- -
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- MSL 3 - 168小时